For sub 65nm nano-electronic devices, a continuous shrinking of dielectric constant is needed and the k-value below 2.0 should be achieved for the insulator between interconnect. The k-value for silicon-based nano-porous films prepared by plasma enhanced chemical vapor deposition can be reduced to below 2.0. The porous SiCOH film becomes the most promising candidate in the many ultra-low-k materials . However, the formation of nano-pores in the films also brings many problems, such as the deterioration of mechanical and thermal stability, the difficulty in integration, and the difficulty in microstructures analysis. This paper presents a review of advances in SiCOH ultra-low-k film and interconnect challenges for sub 65nm generation.